For instructions that are normally eight characters, if there's not a
word mark after the eighth character, the data flow manual indicates that
the processor scans for a word mark (in I-8 cycle). During the scan, it
copies the B register to the A register. Instructions that interpret a
D-modifier find it in the A register. This means that an instruction
that is normally eight characters finds its D-modifier in the last
character before the word mark, even if it's not the eighth character.
Is this correct?
What happens if you write a long instruction in place of one that is
normally five characters, such as CCB or CU? Does the processor try to
construct a valid B address, and check-stop if there isn't one? It
doesn't do this for NOP, but is NOP special, or does the processor
postpone checking that the B-address register contains a valid address
until it needs to use it as an address?