;-*- Mode:Text -*-

Wire-wrap: 31 x 9 = 279    ;wire-wrap limit
Easy PC: 33 x 8 = 264
Likely PC: 33 x 9 = 297
	   34 x 9 = 306    ;probable limit
Max for PC: 35 x 9 = 314
TI surface-mount memory board: 16 x 34 = 544
Explorer processor: 2 x (360) = 720

Today's chip count:

;Processor:
(+
;drawn pages
	68	;ALU loop; ALU chip (10); register RAM, MFO, MFIO (32 16p)
	 ;-8	;sips for register RAM
	5	;ALU chip inputs (all 16p)
	5	;passaround comparators
	3	;type checking
	17	;PC mux (all 16p)
	8	;PC+1 (all 16p)
	27	;register frame select, addr mux (8 16p)
	2	;jump select

	45	;call hardware Hram, registers
	13	;call hardware freelist
	6	;call hardware control

;drawn but not in real folder
	3 ;6	;PC history
	4	;trap register (2-374 2-8xNAND)
	3	;control / status regs
	4	;clock generator
	6	;func source / dest decoding

;not drawn
	10	;trap sequencing / clock gating
;	5	;boot prom / shifter
;	5	;mfio shifter
;	6	;debug interface, hardware single-step

	20	;slop?

;icache / IR in P board
	16	;IR using 398/399s
	 ;32	;2 4Kx64 sets using 20 pin common I/O 4Kx4 rams
	8	;2 4Kx64 sets using 4 sips with 8 4Kx4 common I/O rams per sip
	16 ;8	;cache data buffers (8 ok, but no self-test)
	8	;IR -> MFO
	18	;cache tag, cache control, PC buffer

;icache / IR with 16Kx4 rams and AMD cache tag chip
;;	8	;IR using 374s
;;	16	;16K x 64
;;	8	;data buffers
;;	18	;tag and control
 
;ways to save:
	;-3	;sips for Hram
	-10	;simpler call hardware?
	;-25	;cache using 16Kx4 rams and cache-tag-and-comparator chips

);	===
Total:  305

; .05" sip with 8 4Kx4 common I/O rams
; takes space of 2 dips
(+	2	;power
	2	;control
	12	;address
	32	;data
);	===
Total:  48

;Memory board:
(+	12	;VMA, MD (F543 or 29F52)
	65	;Icache, mux, MD buf (sep. I/O)
	20	;static low memory, CS
	;; 16	;Data cache, single set (on P board, with part of map?)
	  ;40	;Data cache, two-set; mux (sep. I/O)
	38	;One-level map; GC hardware (SIPS trade 28 dips for 4 sips)
	  ;18	;map using SIPS instead
	20 ;16	;NuBus (F543 or 29F52)
	3	;nubus interrupt page encoded to traps (8)
	8	;diag data path buffers; MMA / MMD shunt
	 ;4 ;9	;32-bit counter (two plus one mux?)
	10 	;DRAM mux, buffers
	6	;DRAM parity
	10	;DRAM control
	  ;11	;DRAM vertical parity (36 bit parity reg; 22 bit last addr)
	2	;resistors
	32	;equiv. 16 DRAM sips
	(// (- 72 40) 5) ;adjust for excess 24-pin dips vs. 16-pin dips
	35	;decoding and control
	  ;32	;adjust for 8MB of 256K DRAM
);     ===
Total:  267

;24-pin muxes, buffers?

total for DRAM: 1M sips
(+	10	;DRAM mux, buffers
	6	;DRAM parity
	10	;DRAM control
	11	;DRAM vertical parity (36 bit parity reg; 22 bit last addr)
	2	;resistors
	32	;equiv. 16 DRAM sips
	10	;refresh / control
);	===
Total:  81

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zwei:
(defcom com-count-chips
		  "Count chips"
		  ()
       (let (start-bp end-bp)
	 ;;find start of form where we typed C-Sh-E
	 (setq start-bp (FORWARD-DEFUN (POINT) -1))
	 (when (null start-bp) (barf "Point in wrong place."))
	 ;;find e